Design of a 270 MHz/340 mW processing element for high performance motion estimation systems application

Emerging architectures, technologies and strategies applied to the development of systems for video processing will alleviate the restrictions imposed by limited bandwidth in present communication channels. In this article, the use of GaAs technology together with the application of different techniques applied to existing architectures for motion estimation developed in the literature, are presented. Among the several possible searching methods to compute the block-matching algorithm (BMA), the full-search BMA (FBMA) has obtained great interest from the scientific community due to its regularity, optimal solution and low control overhead which simplifies its VLSI realization. On the other hand, its main drawback is the demand of an enormous amount of computation. There are different ways of overcoming this factor, being the use of advanced technologies, such as gallium arsenide (GaAs), the one adopted in this article together with different techniques to reduce area overhead. The implementation of a 270 MHz processing element (PE) for a FBMA scheme is presented in this paper. From the results obtained for this basic module, an implementation for MPEG applications is proposed, leading to an architecture running at 145 MHz with a power dissipation of 3.48 W and an area of 11.5 mm².