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Dual-metal gate CMOS technology with ultrathin silicon nitride gatedielectric
Authors:Yee-Chia Yeo Qiang Lu Ranade   P. Takeuchi   H. Yang   K.J. Polishchuk   I. Tsu-Jae King Chenming Hu Song   S.C. Luan   H.F. Dim-Lee Kwong
Affiliation:Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA;
Abstract:We report the first demonstration of a dual-metal gate complementary metal oxide semiconductor (CMOS) technology using titanium (Ti) and molybdenum (Mo) as the gate electrodes for the N-metal oxide semiconductor field effect transistors (N-MOSFETs) and P-metal oxide semiconductor field effect transistors (P-MOSFETs), respectively. The gate dielectric stack consists of a silicon oxy-nitride interfacial layer and a silicon nitride (Si3N4) dielectric layer formed by a rapid-thermal chemical vapor deposition (RTCVD) process. C-V characteristics show negligible gate depletion. Carrier mobilities comparable to that predicted by the universal mobility model for silicon dioxide (SiO2) are observed
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