An analytical model for the power bipolar-MOS transistor

This paper presents an analytical model for the I–V characteristics of the bipolar-MOS power transistor, also known as IGT or COMFET. Good agreement between this model and experiments is found over a wide range of carrier lifetime and current density. The predicted trade-off between the forward voltage drop and device turn-off time (0.4–10 μsec) has been verified by experiment. For even shorter switching time, the model predicts only a moderate increase in V_F. Adding a more heavily doped buffer epitaxial layer is shown to only slightly increase V_F but offers several important benefits. The comparison between n-channel and p-channel devices is discussed using the model and the forward voltage drops for the two types of devices are shown to differ by only a small percentage in spite of the large difference in electron and hole mobilities.