Safe design of high-performance embedded systems in an MDE framework |
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Authors: | Huafeng Yu Abdoulaye Gamatié Éric Rutten Jean-Luc Dekeyser |
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Affiliation: | 1. INRIA/CNRS/USTL/LIFL, 40 avenue Halley, Parc Scientifique de la Haute Borne, 59650, Villeneuve d’Ascq, France 2. INRIA Grenoble - Rh?ne-Alpes, Inovallée, 655 avenue de l’Europe, Montbonnot, 38334, Saint Ismier Cedex, France
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Abstract: | In this paper, we use the UML MARTE profile to model high-performance embedded systems (HPES) in the GASPARD2 framework. We address the design correctness issue on the UML model by using the formal validation tools associated with synchronous languages, i.e., the SIGALI model checker, etc. This modeling and validation approach benefits from the advantages of UML as a standard, and from the number of validation tools built around synchronous languages. In our context, model transformations act as a bridge between UML and the chosen validation technologies. They are implemented according to a model-driven engineering approach. The modeling and validation are illustrated using the multimedia functionality of a new-generation cellular phone. |
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Keywords: | MARTE High-performance embedded systems Gaspard2 Synchronous languages Formal validation S font-variant:small-caps" >IGALI Mode automata |
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