Multi-port dynamic compact thermal models of dual-chip package using model order reduction and metaheuristic optimization |
| |
| Affiliation: | 1. Université Paris Ouest, Laboratoire Thermique Interfaces Environnement, 50 rue de Sèvres, 92410 Ville d''Avray, France;2. Thales Global Services, 19-21 Avenue Morane Saulnier, Vélizy-Villacoublay, France;3. Department of Electronics, Information and Bioengineering, Politecnico di Milano, Milan, Italy;4. Department of Electrical Engineering and Information Technology, University Federico II, Naples, Italy;1. Institute of Microelectronics of Chinese Academy of Sciences, 3rd Beitucheng West Road, Chaoyang Qu, 10029 Beijing, China;2. University of Chinese Academy of Sciences, 19th Yuquan Road, Shijingshan Qu, 100049 Beijing, China;1. State Key Lab of Electronic Thin Films & Integrated Devices, School of Electronic Science and Engineering, University of Electronic Science & Technology of China, 610054 Chengdu, China;2. Institute of Biomedical Engineering, Chinese Academy of Medical Science and Peking Union Medical College, 300192 Tianjin, China |
| |
| Abstract: | Delphi-like boundary condition independent (BCI) compact thermal models (CTMs) are the standard for modelling single die packages. However their extraction, particularly in the transient case, will be time consuming due to complex numerical simulations for a large number of external conditions. Lately, new approaches to extract a BCI dynamical CTM (DCTM), based on model order reduction (MOR) were developed. Despite the numerous advantages of this recent method, the lack of numerical tools to integrate reduced-order models (ROM) makes it difficult to use at board level. In this study, a novel process flow for extracting Delphi-inspired BCI DCTMs is proposed. Thus a detailed three-dimensional model is replaced by a BCI-ROM model using FANTASTIC matrix reduction code to generate the data used in the creation of a Delphi-style BCI DCTM. That hybrid reduction method has been applied, at first on a single-chip package (QFN16) then on a dual-chip package (DFN12). Their derived CTM and DCTM have been compared in term of accuracy and creation time using, or not, MOR reduction technique. The results show that for a similar accuracy, the integration of MOR technique allows minimizing the time-consuming numerical simulations and consequently reduce the thermal network creation time by 80%. |
| |
| Keywords: | |
| 本文献已被 ScienceDirect 等数据库收录！ |
|
