0．6VCMOS轨至轨运算放大器

为适应低压低功耗设计的应用，设计了一种超低电源电压的轨至轨CMOS运算放大器。采用N沟道差分对和共模电平偏移的P沟道差分对来实现轨至轨信号输入．。当输入信号的共模电平处于中间时，P沟道差分对的输入共模电平会由共模电平偏移电路降低，以使得P沟道差分对工作。采用对称运算放大器结构，并结合电平偏移电路来构成互补输入差分对。采用0．13μm的CMOS工艺制程，在0．6V电源电压下，HSpice模拟结果表明，带10pF电容负载时，运算放大器能实现轨至轨输入，其性能为：功耗390μw，直流增益60dB，单位增益带宽22MHz，相位裕度80°。

0.6 V CMOS Operational Amplifier with Rail-to-rail Input

A low-voltage CMOS operational amplifier with raibto-rail input is presented for the low voltage and low power appli- cations. The rail-to-rail signal input is realized by a n channel differential input pair and a common-mode level-shift p-channel differen- tial input pair. Input common-mode voltage of p-channel differential input pair decreases by the level-shift circuit when the input com- mon mode voltage is at the middle of the supply voltage. The symmetrical op amp is combined with the level-shift complementary dif- ferential input pairs to achieve the level shift circuit. The op amp is simulated by HSpice with 0.13 μm CMOS process at 0. 6 V sup- ply voltage. The results show that the rail-to-rail input of the operational amplifier can be realized at 10 pF load, whose DC gain is 60 dB, unit-gain bandwidth 22 MHz, power dissipation 390 μW and phase margin 80 °.