| 电路系统中的闩锁效应及其预防设计 |
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| 引用本文： | 吴允平,苏伟达,李汪彪,蔡声镇.电路系统中的闩锁效应及其预防设计[J].现代电子技术,2011,34(1):170-172. |
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| 作者姓名： | 吴允平 苏伟达 李汪彪 蔡声镇 |
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| 作者单位： | 1. 福建师范大学电子信息工程系,福建福州,350007
2. 福建师范大学软件学院,福建福州,350007 |
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| 基金项目： | 福建省自然科学基金项目，福建省科技厅项目，校教师项目 |
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| 摘 要： | 针对CMOS集成电路的闩锁效应，围绕实际应用的电路系统中易发生闩锁效应的几个方面进行了详细说明，提出了采用严格的上电时序、基于光耦的电路隔离设计和热插拔模块的接口方法，可以有效地降低发生闩锁效应的概率，从而提高电路系统的可靠性。
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| 关 键 词： | 闩锁效应 上电时序 光耦 热插拔 |
Latch-up Effect and Its Prevention in Circuit Systems Based on CMOS |
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| WU Yun-ping,SU Wei-da,LI Wang-biao,CAI Sheng-zhen.Latch-up Effect and Its Prevention in Circuit Systems Based on CMOS[J].Modern Electronic Technique,2011,34(1):170-172. |
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| Authors: | WU Yun-ping SU Wei-da LI Wang-biao CAI Sheng-zhen |
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| Affiliation: | WU Yun-ping1,SU Wei-da1,LI Wang-biao1,CAI Sheng-zhen2(1.Department of Electronic Engineering,Fujian Normal University,Fuzhou 350007,China,2.Faculty of Software,China) |
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| Abstract: | The latch-up effect which is easy to appear in CMOS IC and the widely used circuit systems with an attributive defect leading to failure of circuits is elaborated.Key factors causing latch-up effect are discussed.Furthermore,the special interface method of critical power-on time-sequence,circuit isolatation design based on photo-electric coupler and hot-plugging modules is proposed.It testified in applications that the designs are helpful to reduce the risk of latch-up effect. |
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| Keywords: | latch-up effect power-on time-sequence photo-electric coupler hot-plugging |
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