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具有高线性调谐特性的1.2 GHz CMOS频率综合器
引用本文:李振荣,庄奕琪,龙强. 具有高线性调谐特性的1.2 GHz CMOS频率综合器[J]. 电子科技大学学报(自然科学版), 2012, 41(6): 853-858. DOI: 10.3969/j.issn.1001-0548.2012.06.007
作者姓名:李振荣  庄奕琪  龙强
作者单位:1.西安电子科技大学微电子学院教育部宽禁带重点实验室 西安 710071
基金项目:国家自然科学基金(61076101),中央高校基本科研业务费专项资金(K50511250005)
摘    要:基于0.18 μm RF CMOS工艺实现了一个1.2 GHz高线性低噪声正交输出频率综合器,该综合器集成了一种高线性低调谐灵敏度的低噪声LC压控振荡器;降低了系统对锁相环中其他模块的要求;基于源极耦合逻辑实现了具有低开关噪声特性的正交输出高速二分频,采用"与非"触发器结构实现了高速双模预分频,并集成了数控鉴频鉴相器和全差分电荷泵,获得了良好的频率综合器环路性能。对于1.21 GHz的本振信号,在100 kHz和1 MHz频偏处的相位噪声分别为-99.1 dBc/Hz和-123.48 dBc/Hz。该频率综合器具有从1.13~1.33 GHz的输出频率范围。工作电压1.8 V时,芯片整体功耗20.4 mW,芯片面积(1.5×1.25) mm2。

关 键 词:频率综合器   相位噪声   锁相环   正交输出   压控振荡器
收稿时间:2011-01-20

1.2 GHz CMOS High-Linearity Frequency Synthesizer
Affiliation:1.Key Laboratory of the Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices,School of Microelectronics,Xidian University Xi'an 710071
Abstract:An implementation for a 1.2 GHz high-linearity quadrature output frequency synthesizer is presented in standard 0.18 μm RF CMOS technology. For achieving optimized phase-noise performance, a high-linearity and low-tuning-sensitivity LC voltage-controlled oscillator is employed. Based on low-switchingnoise source-coupled logic structure, a high-speed divider-by-2 circuit is realized to achieve quadrature local oscillating signal, and a high-speed 8/9 dual-modulus prescaler circuit is implemented. A digital controlled phase frequency detector and difference charge pump are also integrated in the frequency synthesizer. From the carrier frequency of 1.21 GHz, the phase noise of proposed frequency synthesizer is -99.1dBc/Hz and -123.48 dBc/Hz at 100 kHz and 1 MHz offset respectively. The range of output frequency is from 1.13 GHz to 1.33 GHz, the power dissipation is 20.4 mW from a 1.8 V power supply, and the area is (1.5×1.25) mm2.
Keywords:
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