可编程的帧内预测器结构设计与实现

针对超低成本超低功耗便携式移动应用,基于可编程的思想,提出了一种独特的适用于H.264/AVC和AVS双模解码器的帧内预测器架构。该架构利用H.264/AVC和AVS帧内预测在数据通路上的相似性,通过定制专有的8位微指令集和高效的数据通路,实现了一个专用可编程内核,该内核仅包含一个16位累加器和一个16位桶形移位器。实现结果表明,在0.18 μm工艺下,逻辑规模仅为6.3K等效逻辑门;电路在35 MHz工作频率下可以实时处理D1(720×480)格式30 f/s的H.264/AVC和AVS视频序列;在1.8 V电压下功耗仅为0.53 mW,具有面积小、功耗低、灵活性好的特点。

Design and Implementation of a Programmable Intra Prediction Architecture

For low cost and low power portable mobile applications, a unique intra prediction architecture for H.264/AVC and AVS dual-mode decoder is proposed based on the idea of programmability. By analyzing the similarity of the data path of different prediction modes in H.264/AVC and AVS, a specific programmable core with customized 8 bit microcode set and efficient data path is implemented. It contains only one 16-bit accumulator and one 16-bit barrel shifter. Implementation results show that the total gates count is only about 6.3K under 0.18 μm process, and the circuit can process real-time H.264/AVC and AVS sequences at D1(720×480) 30 f/s at 35 MHz with only 0.53 mW power consumption at 1.8 V power supply.