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基于DNA和限制性核酸内切酶的基本逻辑门设计
引用本文:柳娟, 谢文彬, 汪改英, 汤敏丽. 基于DNA和限制性核酸内切酶的基本逻辑门设计[J]. 电子与信息学报, 2020, 42(6): 1332-1339. doi: 10.11999/JEIT190846
作者姓名:柳娟  谢文彬  汪改英  汤敏丽
作者单位:1.厦门大学航空航天学院 厦门 361102;;2.厦门大学信息学院 厦门 361005;;3.厦门大学深圳研究院 深圳 518057
基金项目:国家自然科学基金(61772441, 61872309),国家重点研发计划政府间专项(2017YFE0130600)
摘    要:由于DNA分子具有特异性、高并行性、微小性等天然特性,在信息处理过程中展现出了强大的并行计算能力和数据存储能力。该文研究将具有特异性识别功能的限制性核酸内切酶引入DNA链置换反应中,作为DNA电路的输入,通过控制立足点的生成和移除设计了是门、非门和与门3种基本逻辑门。采用Visual DSD对逻辑模型进行模拟仿真,并通过凝胶电泳实验验证设计。与以往的分子逻辑门比较,该设计反应迅速,操作简便,具有良好的扩展性,为大规模电路的设计提供了可能性。

关 键 词:分子逻辑计算   DNA链置换   限制性核酸内切酶   基本逻辑门
收稿时间:2019-11-01
修稿时间:2020-04-24

Basic Logic Gates Design Based on DNA and Restriction Endonuclease
Juan LIU, Wenbin XIE, Gaiying WANG, Minli TANG. Basic Logic Gates Design Based on DNA and Restriction Endonuclease[J]. Journal of Electronics & Information Technology, 2020, 42(6): 1332-1339. doi: 10.11999/JEIT190846
Authors:Juan LIU  Wenbin XIE  Gaiying WANG  Minli TANG
Affiliation:1. School of Aerospace Engineering, Xiamen University, Xiamen 361102, China;;2. School of Informatics, Xiamen University, Xiamen 361005, China;;3. Shenzhen Research Institute, Xiamen University, Shenzhen 518057, China
Abstract:Due to the natural characteristics of specificity, high parallelism and miniaturization of DNA molecules, it exhibits strong parallel computing power and data storage capability in information processing. In this study, restriction endonuclease with specific recognition function are introduced into DNA strand displacement as the input of the DNA circuit. The YES gate, NOT gate and AND gate are designed by controlling the generation and removal of the toehold. The logic model is simulated by Visual DSD, and the design is verified by PolyacrylAmide Gel Electrophoresis(PAGE) experiments. Compared with previous molecular logic gates, this design has a quick response, simple operation, and good scalability, which provides the possibility for the design of large-scale circuits.
Keywords:Molecular logic computation  DNA strand displacement  Restriction endonuclease  Basic logic gates
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