基于公式递推法的可变计算位宽的循环冗余校验设计与实现

循环冗余校验(CRC)与信道编码的级联使用，可以有效改善译码的收敛特性。在新一代无线通信系统，如5G中，码长和码率都具有多样性。为了提高编译码分段长度可变的级联系统的译码效率，该文提出一种可变计算位宽的CRC并行算法。该算法在现有固定位宽并行算法的基础上，合并公式递推法中反馈数据与输入数据的并行计算，实现了一种高并行度的CRC校验架构，并且支持可变位宽的CRC计算。与现有的并行算法相比，合并算法节省了电路资源的开销，在位宽固定时，资源节约效果明显，同时在反馈时延上也有将近50%的优化；在位宽可变时，电路资源的使用情况也有相应的优化。

Design and Implementation of Cyclic Redundancy Check with Variable Computing Width Based on Formula Recursive Algorithm

Cyclic Redundancy Check (CRC) is used in cascade with channel coding to improve the convergence of the decoding. In the new generation of wireless communication systems, such as 5G, both code length and code rate are diverse. To improve the decoding efficiency of cascaded systems, a CRC parallel algorithm with variable computing width is proposed in this paper. Based on the existing fixed bit-width parallel algorithm, this algorithm combines the parallel calculation of feedback data and input data in the formula recursive method, realizing a highly parallel CRC check architecture with variable bit-width CRC calculation. Compared with the existing parallel algorithms, the merged algorithm saves the overhead of circuit resources. When the bit-width is fixed, the resource saving effect is obvious, and at the same time, the feedback delay is also optimized by nearly 50%. When the bit-width is variable, the use of resources is also optimized accordingly.