TiN栅薄膜全耗尽SOI CMOS器件

制备并研究了TiN栅薄膜全耗尽SOI CMOS器件,并对其关键工艺进行了详细阐述.相对于双多晶硅栅器件,在不改变阈值电压的前提下,可以减小nMOS和pMOS的沟道掺杂浓度,进而提高迁移率.由于TiN的功函数处于中间禁带,在几乎相同的调整阈值注入剂量下,可以得到对称的阈值电压.当顶层硅膜厚度减小时,可以改善短沟道效应.

W/TiN Gate Thin-Film Fully-Depleted SOI CMOS Devices

TiN gate thin-film fully-depleted SOI CMOS devices are fabricated and discussed.Key process technologies are demonstrated.Compared with the dual polysilicon gate devices,the channel doping concentration of nMOS and pMOS can be reduced without changing threshold voltage (VT),which enhances the mobility.Symmetrical VT is achieved by nearly the same VT implant dose because of the near mid-gap workfunction of TiN gate.The SCE effect is improved when the thin-film thickness is reduced.