Effect of localised charges on nanoscale cylindrical surrounding gate MOSFET: Analog performance and linearity analysis |
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| Authors: | Rajni Gautam Manoj Saxena R.S. Gupta Mridula Gupta |
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| Affiliation: | 1. Semiconductor Device Research Laboratory, Department of Electronic Science, University Of Delhi, South Campus, Benito Juarez Road, New Delhi 110 021, India;2. Department of Electronics, Deen Dayal Upadhyaya College, University of Delhi, Karampura, New Delhi 110 015, India;3. Department of Electronics and Communication Engineering, Maharaja Agrasen Institute of Technology, Sector 22, Rohini, New Delhi 110 086, India |
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| Abstract: | The paper presents a simulation study of Nanoscale Cylindrical Surrounding Gate (SRG) MOSFET with localised interface charges. The objective of the present work is to study the performance degradation due to hot carrier induced/radiation induced/stress induced damage in the form of localised/fixed charges at the semiconductor/oxide interface of the device. Impact of fixed charges has been studied on the characteristics such as drain current, transconductance and its higher order terms, device efficiency and linearity FOMs. Effect of nature and extension of interface fixed charges has been discussed in detail through extensive simulation. Circuit reliability issues of the device are discussed in terms of DC bias point degradation. |
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