Realizing high breakdown voltage for a novel interface charges islands structure based on partial-SOI substrate |
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| Authors: | Shengdong Hu Jun Luo Kaizhou Tan Ling Zhang Zhaoji Li Bo Zhang Jianlin Zhou Ping Gan Guolin Qin Zhengyuan Zhang |
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| Affiliation: | 1. College of Communication Engineering, Chongqing University, Chongqing 400030, China;2. National Laboratory of Analogue Integrated Circuits, Sichuan Institute of Solid-State Circuits, No. 24 Research Institute of China Electronics Technology Group Corporation, Chongqing 400060, China;3. State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China |
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| Abstract: | A novel interface charge islands partial-SOI (ICI PSOI) high voltage device with a silicon window under the source and its mechanism are studied in this paper. ICI PSOI is characterized by a series of equidistant high concentration n+-regions on the bottom interface of top silicon layer. On the condition of high-voltage blocking state, inversion holes located in the spacing of two n+-regions effectively enhance the electric field of the buried oxide layer (EI) and reduce the electric field of the silicon layer (ES), resulting in a high breakdown voltage (VB). It is shown by the simulations that the enhanced field ΔEI and reduced field ΔES by the accumulated holes reach to 449 V/μm and 24 V/μm, respectively, which makes VB of ICI PSOI increase to 663 V from 266 V of the conventional PSOI on 5 μm silicon layer and 1 μm buried oxide layer with the same silicon window length. On-resistance of ICI PSOI is lower than that of the conventional PSOI. Moreover, self-heating-effect is alleviated by the silicon window in comparison with the conventional SOI at the same power of 1 mW/μm. |
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