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VLSI容错设计研究进展(1)——缺陷的分布模型及容错设计的关键技术
引用本文:郝跃,赵天绪,易婷. VLSI容错设计研究进展(1)——缺陷的分布模型及容错设计的关键技术[J]. 固体电子学研究与进展, 1999, 0(1)
作者姓名:郝跃  赵天绪  易婷
作者单位:西安电子科技大学微电子研究所
摘    要:随着芯片面积的增加及电路复杂性的增强,芯片的成品率逐渐下降,为了保证合理的成品率,人们将容错技术结合入了集成电路。文中首先概述了缺陷及其分布,然后概述了容错技术,并详细地叙述了动态容错技术中的两个关键问题:故障诊断及冗余单元的分配问题。

关 键 词:缺陷  故障诊断  容错技术  冗余单元  故障重构

Researching Development of IC Fault tolerant Design The Critical Technique of the Defect Distribution Model and Fault tolerant Design
Hao Yue Zhao Tianxu Yi Ting. Researching Development of IC Fault tolerant Design The Critical Technique of the Defect Distribution Model and Fault tolerant Design[J]. Research & Progress of Solid State Electronics, 1999, 0(1)
Authors:Hao Yue Zhao Tianxu Yi Ting
Abstract:An increase in chip area and circuit complexity leads to a reduction in the yield of chip production. In order to get a fair yield, the fault tolerant technique is introduced into the IC design. In this paper, the model of defect distribution and the fault tolerant technique are simply described, with emphasis on the two problems of fault diagnosis and allocation of spare elements in the dynamic fault tolerant technique.
Keywords:Defect Fault Diagnosis Fault tolerant Technique Redundant Elements Fault Reconfiguration  
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