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High-Speed VLSI Implementation of an Improved Parallel Delayed LMS Algorithm |
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| Authors: | Liu Ming Guan Mingxiang Wu Zhou Sun Chongwu Zhang Weifeng Wang Mingjiang |
| Affiliation: | 1.School of Microelectronics, Shenzhen Institute of Information Technology, Shenzhen, 518000, China ;2.Faculty of Electronics and information Engineering, Harbin Institute of Technology, Shenzhen, 518000, China ; |
| Abstract: | Mobile Networks and Applications - Motivated by improvement of convergence rate and throughput performance, this work develops a systematic high-speed VLSI implementation of the adaptive filter... |
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