| 脉冲信号数字滤波以及无缝计数电路设计 |
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| 引用本文： | 骆毅,张志文. 脉冲信号数字滤波以及无缝计数电路设计[J]. 西安工业大学学报, 2012, 0(2): 157-161 |
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| 作者姓名： | 骆毅 张志文 |
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| 作者单位： | 西安工业大学电子信息工程学院,西安710032 |
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| 摘 要： | 惯导产品输出脉冲信号存在干扰信号,为减少其对惯导产品性能的影响,文中设计了一种基于FPGA的脉冲信号数字滤波器,并对滤波后脉冲信号以5ms为计数单元进行无缝计数,计数结果可由串行总线上传至上位机进行显示和处理.通过该方法测量的惯导产品输出脉冲信号频率最高可达13MHz,其中可对频率范围为50kHz～12.5MHz的干扰信号进行滤除,满足惯导产品性能测试要求.
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| 关 键 词： | 惯导产品 数字滤波 无缝计数 现场可编程门阵列 |
Pulse Digital Filtering and Seamless Counting Circuit Design |
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| LUO Yi,ZHANG Zhi-wen. Pulse Digital Filtering and Seamless Counting Circuit Design[J]. Journal of Xi'an Institute of Technology, 2012, 0(2): 157-161 |
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| Authors: | LUO Yi ZHANG Zhi-wen |
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| Affiliation: | (School of Electronic Information Engineering,Xi＇an Technological University,Xi＇an 710032,China) |
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| Abstract: | There are random interfering signals in the output pulse signal of inertial navigation components.In order to reduce the impact of interfering signals on the performance of inertial navigation component,a FPGA-based pulse signal digital filter is designed,and a seamless count is implemented for the filtered pulse signal once evey 5 ms.The count results is sent to host computer by serial bus to display and process.After a long period of system testing,output pulse signal frequency of inertial navigation components reaches up to 13 MHz by the method.It filteres interference signal in the range of 50 kHz~12.5 MHz,which meets the test requirements. |
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| Keywords: | inertial navigation component digital filtering seamless counting field programmable gate array（FPGA） |
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