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Leakage Current in Sub-Quarter Micron MOSFET: A Perspective on Stressed Delta I DDQ Testing
Authors:Oleg Semenov  Arman Vassighi  Manoj Sachdev
Affiliation:(1) Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Canada, N2L 3G1
Abstract:The effectiveness of single threshold I DDQ measurement for defect detection is eroded owing to higher and more variable background leakage current in modern VLSIs. Delta I DDQ is identified as one alternative for deep submicron current measurements. Often delta I DDQ is coupled with voltage and thermal stress in order to accelerate the failure mechanisms. A major concern is the I DDQ limit setting under normal and stressed conditions. In this article, we investigate the impact of voltage and thermal stress on the background leakage. We calculate I DDQ limits for normal and stressed operating conditions of 0.18 mgrm n-MOSFETs using a device simulator. Intrinsic leakage current components of transistor are analyzed and the impact of technology scaling on effectiveness of stressed DeltaI DDQ testing is also investigated.
Keywords:CMOS integrated circuits  I DDQ testing  quality  reliability  MOSFET leakage
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