Design of a laminated current cell relocation 12-bit CMOS D/A converter with a high output impedance technique and a merged switching logic |
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Authors: | Junho Moon Minkyu Song Seungchul Shin Kyungho Moon Byungha Park |
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Affiliation: | (1) Department of Semiconductor Science, Dongguk University, Seoul, 100-715, Korea;(2) Sanmsung Electronics Co., Ltd, Yongin-City, Gyeonggi-Do, 449-771, Korea; |
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Abstract: | A compact and low power 12-bit 300 MS/s current steering CMOS D/A converter is presented. The architecture of the D/A converter
is based on the current steering 6 + 6 segmented type with a laminated current cell relocation technique. In order to improve
the linearity and glitch noise, a high output impedance analog current cell is designed. Furthermore, for the purpose of reducing
the chip area and power dissipation, a noble merged switching logic and a compact layout technique are proposed. To verify
its performance, the chip was fabricated with 0.13 μm thick-gate 1-poly 6-metal N-well Samsung CMOS technology. The effective
chip area is 0.26 mm2 (510 × 510 μm) with a power consumption of 100 mW. The measured INL and DNL are within ±3LSB and ±1LSB, respectively. The
measured SFDR is about 70 dB, when the input frequency is 1 MHz at a clock frequency of 300 MHz. |
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