Electroless Ni/Au Bump on a Copper Patterned Wafer for the CMOS Image Sensor Package in Mobile Phones |
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Authors: | Joong-Do Kim |
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Affiliation: | (1) Semiconductor Material R&D Center, Samsung Techwin Co., Ltd, Kyoungki-Do, 449-712, Republic of Korea |
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Abstract: | Wafer bumping technology using an electroless Ni/Au bump on a Cu patterned wafer is studied for the flip chip type CMOS image
sensor (CIS) package for the camera module in mobile phones. The effect of different pretreatment steps on surface roughness
and etching of Cu pads is investigated to improve the adherence between the Cu pad and the Ni/Au bump. This study measures
the shear forces on Ni/Au bumps prepared in different ways, showing that the suitable pretreatment protocol for electroless
Ni plating on Cu pads is “acid dip followed by Pd activation” rather than the conventional progression of “acid-dip, microetching,
and Pd activation.” The interface between the Cu pad and the Ni/Au bump is studied using various surface analysis methods.
The homogeneous distribution of catalytic Pd on the Cu pad is first validated. The flip chip package structure is designed,
assembled, and tested for reliability. The successful flip chip bonding in the CIS package is characterized in terms of the
cross-sectional structure in which the anisotropic conductive film (ACF) particles are deformed to about 1.5 μm in diameter. The experimental results suggest that electroless Ni/Au can be applied to the flip chip type CIS package using
Cu patterned wafers for high mega pixel applications. |
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Keywords: | Electroless Ni/Au bump catalytic Pd flip chip CMOS image sensor (CIS) package |
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