一种高鲁棒性数字水印算法的FPGA实现

传统上数字水印算法使用软件方法实现.基于一种高鲁棒性的数字水印算法,研究了使用FPGA实现水印嵌入的方法.先通过提升小波变换将宿主图像进行3次分解,并用混沌置乱算法将水印图像进行置乱加密,然后将第3阶小波分解的LL部分进行SVD分解并得到对应的奇异值矩阵,然后将混沌置乱加密后的水印信息嵌入到该奇异值矩阵中.在该算法的FPGA实现中,主要研究了提升小波变换、混沌置乱加密、矩阵SVD分解的硬件实现方法.实验结果表明,该算法鲁棒性很高,嵌入水印的图像抗攻击性强,算法经过合理推导得以在FPGA上高效地实现.

High robustness digital watermarking algorithm implemented based on FPGA

Traditionally digital watermarking algorithm is implemented by software method.This paper proposes a high robustness digital watermarking algorithm and an implementation based on FPGA.In this paper,the watermark embedding algorithm is mainly realized by LWT,CS and SVD,where lifting wavelet transform is to decompose the host image to 3 stages and chaotic scrambling algorithm is to encrypt the watermark image and then decompose the LL part of third LWT order using SVD to get the corresponding singular value matrix and last embed the encrypted watermark into the singular value matrix.In the FPGA implementation of this algorithm,the hardware implementation of lifting wavelet transform,chaotic scrambling encryption and matrix SVD decomposition are studied.The experimental results show that the proposed algorithm in this paper is robust,and the watermarked image has strong anti-attack ability.The algorithm can be efficiently implemented on FPGA.Finally,the experimental results have been verified,using FPGA to achieve the digital watermarking algorithm is stable and reliable,the watermark embedding rate is greatly improved.