Approximate performance/cost analysis of m-level hierarchical multiprocessor systems |
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Authors: | I Mahgoub M Ilyas |
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Affiliation: | Department of Computer Engineering Florida Atlantic University, Boca Raton, FL 33431, USA (407) 367-3458 |
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Abstract: | In previous work, we introduced and analyzed a generalized class of m-level hierarchical multiprocessor systems 1]. The m levels of hierarchy employed by these systems allowed the use of relatively smaller crossbar switches to support processor-memory communication at the local, nonlocal, and global levels. The analysis showed that, for high rate of local requests the m-level system offers a BandWidth (BW) close to that of a crossbar system and better than that of a typical multiple-bus system (with the number of buses equal to half the number of processors). In this paper, the cost effectiveness of the m-level hierarchical multiprocessor system is evaluated in terms of a cost-related performance measure (BW/Cost). Based on an approximate cost analysis, the bandwidth-to-cost ratio of both the m-level and the crossbar multiprocessor systems has been determined, for hierarchically nonuniform reference model. It has been observed that the m-level system is more effective than the crossbar system for medium and large scale multiprocessor systems. |
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