A holistic approach for tightly coupled reconfigurable parallel processors |
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| Authors: | Hritam Dutta Dmitrij Kissler Frank Hannig Alexey Kupriyanov Jürgen Teich Bernard Pottier |
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| Affiliation: | 1. Hardware/Software Co-Design, Department of Computer Science, University of Erlangen-Nuremberg, Germany;2. Architectures et Systèmes, Université de Bretagne Occidentale, Brest, France;1. Technical University of Munich, Germany;2. Friedrich-Alexander University Erlangen-Nuremberg, Germany;3. Karlsruhe Institute of Technology, Germany;1. Carlson School of Management, University of Minnesota, Minneapolis, MN 55455, United States;2. School of Management, George Mason University, Fairfax, VA 22030, United States;1. Nikolaev Institute of Inorganic Chemistry SB RAS, 630090, 3, Acad. Lavrentiev Ave., Novosibirsk, Russia;2. Novosibirsk State University, 630090, 2, Pirogova Str., Novosibirsk, Russia;3. International Tomography Center SB RAS, 630090, 3A, Institutskaya Str., Novosibirsk, Russia;4. Department of Chemistry and Nanoscience, Ewha Womans University, Seodaemun, Seoul 03760, Republic of Korea;5. Department of Applied Physics, Kyung Hee University, Yong-In, Gyeong-gi 17104, Republic of Korea;1. Urology Service, Department of Surgery, Sidney Kimmel Center for Prostate and Urologic Cancers, Memorial Sloan Kettering Cancer Center, New York, NY;2. Department of Epidemiology and Biostatistics, Memorial Sloan Kettering Cancer Center, New York, NY;3. Department of Medical Oncology, Memorial Sloan Kettering Cancer Center, New York, NY;4. Department of Medicine, SUNY Downstate, New York, NY;5. Department of Pathology, Memorial Sloan Kettering Cancer Center, New York, NY;1. Department of Electronic Engineering/Graduate School at Shenzhen, Tsinghua University, China;2. Shenzhen Key Laboratory of Information Science and Technology, Guangdong, China;3. Department of Computer and Information Science, University of Macau, Macau, China;1. Urology Service, Department of Surgery, Memorial Sloan Kettering Cancer Center, New York, NY;2. Department of Epidemiology and Biostatistics, Memorial Sloan Kettering Cancer Center, New York, NY;3. Department of Medical Oncology, Memorial Sloan Kettering Cancer Center, New York, NY;4. Division of Urology, Department of Surgery, Washington University in St. Louis, St. Louis, MO |
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| Abstract: | New standards in signal, multimedia, and network processing for embedded electronics are characterized by computationally intensive algorithms, high flexibility due to the swift change in specifications. In order to meet demanding challenges of increasing computational requirements and stringent constraints on area and power consumption in fields of embedded engineering, there is a gradual trend towards coarse-grained parallel embedded processors. Furthermore, such processors are enabled with dynamic reconfiguration features for supporting time- and space-multiplexed execution of the algorithms. However, the formidable problem in efficient mapping of applications (mostly loop algorithms) onto such architectures has been a hindrance in their mass acceptance. In this paper we present (a) a highly parameterizable, tightly coupled, and reconfigurable parallel processor architecture together with the corresponding power breakdown and reconfiguration time analysis of a case study application, (b) a retargetable methodology for mapping of loop algorithms, (c) a co-design framework for modeling, simulation, and programming of such architectures, and (d) loosely coupled communication with host processor. |
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