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Cycling degradation in TANOS stack |
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| Authors: | G Ghidini C Scozzari N Galbiati A Modelli E Camerlenghi M Alessandri A Del Vitto G Albini A Grossi T Ghilardi P Tessariol |
| Affiliation: | 1. School of Electrical and Electronic Engineering, Yonsei University, Seoul, Republic of Korea;2. Research & Development Division, SK Hynix Semiconductor Inc, Icheon, Republic of Korea;1. Dept. of Electronics Engineering, Chungnam National University, Daejeon 305-764, Republic of Korea;2. SK Hynix Inc., Gyeongchung-daero, Bubal-eub, Icheon-si 17336, Republic of Korea;3. Electronics and Telecommunications Research Institute, Daejeon 305-350, Republic of Korea;1. Institute of Microelectronics, Tsinghua University, 100084 Beijing, China;2. IMEC, B-3001 Leuven, Belgium |
| Abstract: | The aim of this work is to investigate the physical mechanisms behind TANOS (TaN/Alumina/Nitride/Oxide/Silicon) cycling degradation. A comparison of the degradation induced in the TANOS stack by unipolar or bipolar stress has allowed the separation the different degradation contributions. A comparison with standard floating gate (FG) stack has also been carried out to confirm these degradation mechanisms. Finally, different stack configurations are reported, showing the key factors affecting the degradation and giving trends for improving cycling degradation. |
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