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一种用于优化嵌入式FIR滤波器总线功耗的系数重排算法
引用本文:车德亮,沈绪榜.一种用于优化嵌入式FIR滤波器总线功耗的系数重排算法[J].微电子学与计算机,2005,22(12):1-3,7.
作者姓名:车德亮  沈绪榜
作者单位:西安微电子技术研究所,陕西,西安,710043
摘    要:嵌入式系统对低功耗的要求,使得低功耗设计成为VLSI的主要挑战之一.在嵌入式数字信号处理系统中,可通过降低系统总线的变化率来减少系统功耗.文章研究了一种滤波系数重排算法,用于降低嵌入式FIR滤波器的总线功耗.试验结果表明,该滤波系数重排算法可有效降低54%至69%的嵌入式FIR滤波器总线功耗.

关 键 词:总线低功耗  翻转率  海明距离
文章编号:1000-7180(2005)12-001-03
收稿时间:2005-02-20
修稿时间:2005-02-20

An Algorithm of Coefficient-Ordering for Bus Low Power in Embedded FIR
CHE De-liang,SHEN Xu-bang.An Algorithm of Coefficient-Ordering for Bus Low Power in Embedded FIR[J].Microelectronics & Computer,2005,22(12):1-3,7.
Authors:CHE De-liang  SHEN Xu-bang
Abstract:Technology trends and especially embedded application drive the quest for low-power VLSI design. In DSP systems, large power saving can be achieved through reduction of the transition activity of the on and off chip busses. In this paper, we propose a coefficient-ordering scheme, which is suitable for reducing the switching activity on the lines of data bus in embedded FIR. Experimental results show that the proposed coefficient-ordering algorithm can reduce the total number of bus transitions by 54% to 69%.
Keywords:FIR  Bus low power  Transition activity  Hamming distances  FIR
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