| EDA技术中优化器件逻辑资源的设计方法 |
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| 引用本文： | 刘党辉,秦桂枝,强秀丽.EDA技术中优化器件逻辑资源的设计方法[J].装备指挥技术学院学报,1998(4). |
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| 作者姓名： | 刘党辉 秦桂枝 强秀丽 |
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| 作者单位： | 指挥技术学院基础部 |
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| 摘 要： | 以目前国内外应用广泛的ＬＡＴＴＩＣＥ公司的ＨＤＰＬＤ和ＡＢＥＬ－ＨＤＬ硬件设计描述语言为例，从器件结构、语法特点和描述方法三个方面讨论了在ＥＤＡ中优化器件逻辑资源的方法。其中大部分方法也适用于其它类型ＨＤＰＬＤ的设计。
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| 关 键 词： | EDA 乘积项 适配 硬宏 软宏 |
The Methods Optimizing Device Logic Resources in EDA |
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| Liu Danghui Qin Guizhi Qiang Xiuli.The Methods Optimizing Device Logic Resources in EDA[J].Journal of the Academy of Equipment Command & Technology,1998(4). |
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| Authors: | Liu Danghui Qin Guizhi Qiang Xiuli |
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| Affiliation: | Department of Basic Theories |
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| Abstract: | The article discusses some methods of optimizing logic resources in EDA, such as device structure, special syntax and depiction methods based on LATTICE corporation's HDPLD and ABEL--HDL. which were being widely applied home and abroad. Most of the methods fit for other corporation's HDPLD. |
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| Keywords: | EDA product term fitter hard macro soft macro |
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