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Next generation integral passives: materials, processes, and integration of resistors and capacitors on PWB substrates
Authors:Swapan K. Bhattacharya  Rao R. Tummala
Affiliation:(1) Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, 813 Ferst Drive, Atlanta, GA 30332-0560, USA;(2) Packaging Research Center, School of Electrical and Computer Engineering, Georgia Institute of Technology, 813 Ferst Drive, Atlanta, GA 30332-0560, USA
Abstract:Integral passives are becoming increasingly important in realizing next generation electronics industry needs through gradual replacement of discretes. The need for integral passives emerges from the increasing consumer demand for product miniaturization thus requiring components to be smaller and packaging to be space efficient. In this paper, the feasibility of integration of polymer/ceramic thin film (sim5 mgrm thick) capacitors (C) with other passive components such as resistors (R) and inductors (L) has been discussed. An integrated RC network requiring relatively large capacitance and resistance is selected as a model for co-integration of R and C components using low temperature PWB compatible fabrication processes. This test vehicle is a subset of a large electrical circuit of a functional medical device. In order to produce higher capacitance density and reduce in-plane device area, multi-layer (currently two-layer) capacitors are stacked in the thickness direction. A commercially available Ohmega-Ply resistor/conductor material is selected for integral resistors. Resistors were fabricated using a multi-step lithography process with the utilization of two separate masks. Bottom copper electrodes for capacitors were also defined during the resistor fabrication process. Photodefinable epoxies filled with a high permittivity ceramic powder were used for fabrication of thin film capacitors. Epoxy and ceramic powders were mixed in the required proportion and blended using a high shear apparatus. The coating solution was homogenized in a roll miller for 3 to 5 days prior to casting in order to prevent settling of the higher density ceramic particles. Capacitors were fabricated by spin-coating on the sub-etched copper electrodes. The deposited dielectric layers were dried, exposed with UV radiation, patterned, and thermally cured. Top capacitor electrodes (copper) were deposited using a metal or an e-beam evaporator. The electrodes were patterned using the standard photolithography processes. Selected good samples were used for depositing the second capacitor layer. The RC network is extended to incorporate electroplated polymer/ferrite core micro-inductors through the fabrication of an industry prototype low pass RLC filter. Meniscus coating was evaluated for large area manufacturing with high process yield. A capacitance density of sim3 nF cm–2 was obtained on a single layer capacitor with sim6 mgrm thick films. The capacitance density was increased to sim6 nF cm–2 with the two-layer deposition process. The capacitors were relatively stable up to a frequency range of 120 Hz to 100 KHz. Meniscus coating was qualified to be a viable manufacturable method for depositing polymer/ceramic capacitors on large area (300mm x 300mm) PWB substrates. Dielectric constant values in the range of 3.5 to 35 with increase in filler loading up to 45 vol% were achieved in the epoxy nanocomposite system where the dielectric constant of the host polymer was limited to sim3.5. Higher dielectric constant polymers are required to meet the increasingly higher capacitance needs for the next generation electronics packaging. Possible avenues for achieving higher capacitance density in polymer/ceramic nanocomposite system have been discussed.
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