| 基于NINO芯片的TOT读出电子学系统的研究 |
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| 引用本文： | 秦熙,刘树彬,安琪.基于NINO芯片的TOT读出电子学系统的研究[J].核电子学与探测技术,2012,32(5):556-561,615. |
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| 作者姓名： | 秦熙 刘树彬 安琪 |
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| 作者单位： | 1. 核探测技术与核电子学国家重点实验室,合肥,230026
2. 物理电子学安徽省重点实验室,中国科学技术大学近代物理系,合肥230026 |
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| 基金项目： | 国家自然科学基金面上项目，国家自然科学基金重点项目(10970033)支持 |
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| 摘 要： | 介绍了CERN设计的一款基于过阈时间法(Time-Over-Threshold)的ASIC芯片——NINO,并列出了一些基于NINO芯片设计的测试板的测试结果,用于评估该芯片在BES III端盖TOF升级及在中子管位置灵敏探测器中的位置测量中应用的可能性。NINO芯片8通道高度集成,对实验电路板的设计和测试表明,其噪声抖动低(前沿噪声抖动约5.1 ps),可以满足TOT方法中高精度时间测量的要求。
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| 关 键 词： | NINO 放大甄别 TOT 低噪声 |
The Investigation on the TOT Readout Electronics Which is Based on the NINO Chip |
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| QIN Xi
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LIU Shu-bin
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AN Qi.The Investigation on the TOT Readout Electronics Which is Based on the NINO Chip[J].Nuclear Electronics & Detection Technology,2012,32(5):556-561,615. |
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| Authors: | QIN Xi LIU Shu-bin AN Qi |
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| Affiliation: | 1.State Key Laboratory of Technologies of Particle Detection & Electronics,Hefei 230026,China, 2.Anhui Key Laboratory of Physical Electronics,Department of Modern Physics,University of Science and technology of China,Hefei 230026,China) |
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| Abstract: | The test result of the NINO chip which is based on the time over threshold(TOT) technique is described.The test is carried out to evaluate the possibility of applying the chip in the upgrade of BES III TOF and in the position measurement of Neutrino Position Sensitive Proportional Detector.The NINO chip is 8 channel integrated and of low noise(5.1 ps front edge jitter) which can serve high precision time measurement satisfactorily. |
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| Keywords: | NINO Amplifying and Discrimination TOT Low noise |
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