| 低功耗CMOS工艺中NMOS管阈值电压偏移的研究 |
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| 引用本文： | 袁庆洪,蒋志.低功耗CMOS工艺中NMOS管阈值电压偏移的研究[J].微电子学,2002,32(3):175-177. |
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| 作者姓名： | 袁庆洪 蒋志 |
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| 作者单位： | 清华大学,微电子学研究所,北京,100084 |
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| 摘 要： | 研究了在LPLV CMOS工艺中，用表面沟PMOS管工艺使NMOS管的阈值电压发生偏移的问题。在使用表面沟PMOS管的LPLV CMOM工艺中，NMOS管的多晶栅中的杂质不能达到均匀的分布，导致阈值电压发生偏移。文章提出了三个解决方案，并对其可行性进行了研究。
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| 关 键 词： | 低功耗CMOS工艺 NMOS管 阈值电压偏移 集成电路 |
| 文章编号： | 1004-3365(2002)03-0175-03 |
| 修稿时间： | 2001年7月6日 |
A Study on the Threshold Voltage Shift of NMOS Transistors in Low Power CMOS Process |
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| YUAN Qing hong,JIANG Zhi.A Study on the Threshold Voltage Shift of NMOS Transistors in Low Power CMOS Process[J].Microelectronics,2002,32(3):175-177. |
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| Authors: | YUAN Qing hong JIANG Zhi |
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| Abstract: | Threshold voltage shift of NMOS transistors caused by the modification of surface channel PMOS in the LPLV CMOS process is studied in the paper It is the non uniform impurity distribution in the NMOS poly Si gate that results in the threshold shift Three solutions are proposed and their feasibilities are also discussed |
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| Keywords: | Semiconductor process Process simulation Low power device Threshold voltage shift |
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