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An analytical framework for high-speed hardware particle swarm optimization
Affiliation:1. Electrical and Computer Engineering Department, Beirut Arab University, Debbieh, Lebanon;2. Department of Computer Science and Software Engineering, Concordia University, Montreal, Canada;3. Electrical and Computer Engineering Department, American University of Kuwait, Salmiya, Kuwait;4. Computer Science and Creative Technologies Department, University of the West of England, Bristol, United Kingdom;1. University of Zielona Góra, Institute of Electrical Engineering, ul. Podgórna 50, 65-246 Zielona Góra, Poland;2. Space Research Centre, Polish Academy of Sciences (CBK PAN), Space Robot Dynamics Laboratory, ul. Nowy Kisielin-A.Syrkiewicza 6, 66-002 Zielona Góra, Poland;3. University of Valencia, GPDS, Dept. of Electronic Engineering, ETSE-School of Engineering, Burjassot 46100, Valencia, Spain
Abstract:Engineering optimization techniques are computationally intensive and can challenge implementations on tightly-constrained embedded systems. Particle Swarm Optimization (PSO) is a well-known bio-inspired algorithm that is adopted in various applications, such as, transportation, robotics, energy, etc. In this paper, a high-speed PSO hardware processor is developed with focus on outperforming similar state-of-the-art implementations. In addition, the investigation comprises the development of an analytical framework that captures wide characteristics of optimization algorithm implementations, in hardware and software, using key simple and combined heterogeneous indicators. The framework proposes a combined Optimization Fitness Indicator that can classify the performance of PSO implementations when targeting different evaluation functions. The two targeted processing systems are Field Programmable Gate Arrays for hardware implementations and a high-end multi-core computer for software implementations. The investigation confirms the successful development of a PSO processor with appealing performance characteristics that outperforms recently presented implementations. The proposed hardware implementation attains 23,300 improvement ratio of execution times with an elliptic evaluation function. In addition, a speedup of 1777 times is achieved with a Shifted Schwefels function. Indeed, the developed framework successfully classifies PSO implementations according to multiple and heterogeneous properties for a variety of benchmark functions.
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