| 基于FPGA的改进型FIR滤波器的实现 |
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| 引用本文： | 黄晓红,蔡江利.基于FPGA的改进型FIR滤波器的实现[J].电子技术应用,2009,35(5). |
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| 作者姓名： | 黄晓红 蔡江利 |
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| 作者单位： | 河北理工大学,河北,唐山,063009 |
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| 摘 要： | 利用分布式算法对FIR滤波器的硬件实现进行了探讨,在数乘累加的理论上,对分布式算法的串行、并行和拆分查找表法的FPGA硬件实现方法进行了研究。结合FPGA查找表结构,兼顾资源及运行速度的要求,用拆分查找表的方法设计了16阶8位常系数FIR滤波器,并在Quartus Ⅱ 5.0下进行仿真,仿真结果验证了该算法的有效性和实时性。
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| 关 键 词： | FPGA 分布式算法 拆分查找表 FIR滤波器 |
Design of improved FIR filter based on FPGA |
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| HUANG Xiao Hong,CAI Jiang Li.Design of improved FIR filter based on FPGA[J].Application of Electronic Technique,2009,35(5). |
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| Authors: | HUANG Xiao Hong CAI Jiang Li |
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| Abstract: | By meas of Distributed Algorithm(DA), hardware design of FIR digital filter was discussed. Based on theory of data accu -mulation algorithm, FPGA hardware realization of parallel DA, series DA, and series -parallel DA were studied. By use of speed,resource and series-parallel DA,16-step constants coefficients high speed FIR filter was designed,and the filter was simulated under the eonditions of QuartusII5.0.Simulation results showed that the design method has valididity,real time effectiveness and fea- sibility. |
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| Keywords: | FPGA |
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