| CMOS运算放大器的设计与Cadence仿真 |
| |
| 引用本文： | 钱香,顾群.CMOS运算放大器的设计与Cadence仿真[J].电子测试,2017(2). |
| |
| 作者姓名： | 钱香 顾群 |
| |
| 作者单位： | 无锡科技职业学院电子技术学院,江苏无锡,214028 |
| |
| 摘 要： | 本文根据运算放大器的设计要求(开环电压增益、相位裕度),分析了CMOS运算放大器的性能参数,设计出器件的几何尺寸,最后通过Cadence仿真得到性能指标的仿真结果.
|
| 关 键 词： | 运算放大器 开环电压增益 相位裕度 CMOS |
The Design and Cadence Simulation of CMOS Operational Amplifier |
| |
| Qian Xiang,Gu Qun.The Design and Cadence Simulation of CMOS Operational Amplifier[J].Electronic Test,2017(2). |
| |
| Authors: | Qian Xiang Gu Qun |
| |
| Abstract: | According to the design requirements of the operational amplifier(open loop voltage gain and phase margin), analyzes the performance parameters of CMOS operational amplifier design, geometric dimensions of the device, the simulation results obtained by Cadence simulation performance. |
| |
| Keywords: | Operational amplifier open loop voltage gain phase margin CMOS |
| 本文献已被 万方数据 等数据库收录！ |
|
