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用于CPT芯片级原子钟的滤波器设计
引用本文:和灿斌,刘瑞元,赵建业. 用于CPT芯片级原子钟的滤波器设计[J]. 电子测试, 2017, 0(2). DOI: 10.3969/j.issn.1000-8519.2017.02.010
作者姓名:和灿斌  刘瑞元  赵建业
作者单位:北京大学信息科学技术学院电路与系统实验室,北京,100871
摘    要:长期稳定性优化是芯片级原子钟研究的难点问题,本文讨论了在CPT芯片级原子钟长期稳定性优化过程中,滤波器模块的设计原理和要点,并设计了适用于原子钟的巴特沃斯滤波器.最后,基于本实验室所研究的芯片钟系统对该滤波器进行了开环和闭环测试,所得到的千秒稳为6.62×10-12,万秒稳为1.16×10-11,天稳为6.71×10-12.

关 键 词:芯片钟  长期稳定性  滤波器

Implementation of Filter for CPT Chip-Scale Atomic Clock
He Canbin,Liu Ruiyuan,Zhao Jianye. Implementation of Filter for CPT Chip-Scale Atomic Clock[J]. Electronic Test, 2017, 0(2). DOI: 10.3969/j.issn.1000-8519.2017.02.010
Authors:He Canbin  Liu Ruiyuan  Zhao Jianye
Abstract:The optimization of long-term stability for chip-scale atomic clock has been a difficult problem. This paper discusses the principles of the implementation of filter for CPT chip-scale atomic clock with optimized long-term stability. The details of our implementation are given in this paper. Basing on the chip-scale atomic clock we have designed, we test the performance of the filter. The long-term stability obtained is6.62×10-12 at 1000s,1.16×10-11 at 10000s,6.71×10-12 at day.
Keywords:Chip-Scale Atomic Clock  Long-Term Stability  Filter
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