| 基于FPGA的虚拟通用计数器/信号源集成 |
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| 引用本文： | 宋跃,时章明,周明辉. 基于FPGA的虚拟通用计数器/信号源集成[J]. 微电子学, 2004, 34(1): 77-80,84 |
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| 作者姓名： | 宋跃 时章明 周明辉 |
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| 作者单位： | 湖南科技大学,信息与电气工程学院,湖南,湘潭,411201 |
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| 基金项目： | 湖南省自然科学基金资助项目(02JJY5011)，湖南省教育厅资助重点科研项目(02A051)，湖南省科技攻关资助项目 |
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| 摘 要： | 将通用计数器与信号源集成于FPGA内，借助EPP实现与PC机的通信，以Delphi实现虚拟图形化界面。采用等精度等测量技术和余数插补法，虚拟地实现2个通道0．1Hz～10MHz信号的频率、周期、占空比、脉宽、计数及其频率比、相位差、时间间隔测量，1个扩展通道10MHz～1GHz信号的频率、周期、计数测量，和1个通道频率、占空比、幅度、直流分量步进可调的矩形波(1Hz～1MHz)、正弦波(1Hz～16kHz)等信号的产生。重点介绍了其系统EDA设计、仿真及实验结果。实验表明，本设计是切实可行的。
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| 关 键 词： | FPGA 虚拟仪器 计数器 信号源 虚拟图形化 系统结构设计 VHDL仿真 系统软件 |
| 文章编号： | 1004-3365(2004)01-0077-04 |
Virtual Integration of Universal Counter and Signal Source Based on FPGA''''s |
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| SONG Yue,SHI Zhang-ming,ZHOU Ming-hui. Virtual Integration of Universal Counter and Signal Source Based on FPGA''''s[J]. Microelectronics, 2004, 34(1): 77-80,84 |
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| Authors: | SONG Yue SHI Zhang-ming ZHOU Ming-hui |
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| Abstract: | A virtual integrated instrument is presented,in which universal counter and signal source are integrated in FPGA's.Using equal precision technology,measurement of 0.1 Hz-10 MHz signals in two channels is made for its frequency,cycle,duty cycle,count,pulse-width,frequency ratio,phase difference and time interval,and 10 MHz-1 GHz signals in an extended channel is also measured for its frequency,cycle and count.Cycle signals,such as sine waves(1 Hz-16 kHz),rectangular waves(1 Hz-1 MHz)with output frequency,cycle duty,amplitude and DC component adjustable,are generated using remainder insertion compensation method.Results from the experiment show that the design is feasible. |
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| Keywords: | FPGA Virtual instrument System integration Counter Signal source |
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