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基于FPGA的全数字轴角变换算法
引用本文:赵品志,杨贵杰.基于FPGA的全数字轴角变换算法[J].哈尔滨工业大学学报,2010,42(12):1911-1915.
作者姓名:赵品志  杨贵杰
作者单位:哈尔滨工业大学电气工程及自动化学院;哈尔滨工业大学电气工程及自动化学院
摘    要:为实现低成本、高集成度的全数字轴角变换系统,使用ΔΣ调制技术构建频率、幅值连续可调的激磁信号发生器,对采样点进行优化控制及滤波处理.使用CORDIC算法进行鉴相,通过PI调节器实现快速闭环跟踪,实现一种基于FPGA的全数字闭环角度解算算法.使用Verilog HDL语言编写了ΔΣ调制器、采样时序控制器、CORDIC鉴相器及PI调节器等IP核,搭建了基于Xilinx公司XC3S400型号FPGA的实验平台.实验结果表明:所提出的全数字轴角变换系统,在不增加伺服系统成本的条件下,依靠FPGA的快速并行运算能力,通过分时复用的方法,可实现具有高精度和高动静态特性的全数字轴角变换.

关 键 词:FPGA  旋转变压器  轴角变换算法  ΔΣ调制  CORDIC算法  数字锁相环

FPGA-based all-digital resolver-digital conversion algorithm
ZHAO Pin-zhi and YANG Gui-jie.FPGA-based all-digital resolver-digital conversion algorithm[J].Journal of Harbin Institute of Technology,2010,42(12):1911-1915.
Authors:ZHAO Pin-zhi and YANG Gui-jie
Affiliation:School of Electrical Engineering and Automation,Harbin Institute of Technology,Harbin 150001,China;School of Electrical Engineering and Automation,Harbin Institute of Technology,Harbin 150001,China
Abstract:An FPGA based all-digital close-loop angle tracking algorithm is proposed to achieve an all-digital resolver-digital converter(RDC) with low cost and high integration.ΔΣ modulation technology is introduced into sine reference signal generator,to simplify hardware filtering circuit and minimize the damping and phase lag.Optimized control of sampling and filter processing are applied to guarantee favorable acquisition of sine and cosine feedback signals under harsh EMI environment.A PLL-based angle tracking observer is designed,which uses CORDIC arithmetic for phase detection and PI regulator for rapid close-loop tracking.ΔΣ modulator,time sequence controller,CORDIC phase detector,and PI regulator IP cores are written in Verilog HDL and have been tested on Xilinx XC3S400 FPGA.Experimental results verify that the all-digital RDC can make digital conversion with high precision,high dynamic and static characteristics,relying on rapid parallel algorithm of FPGA without much cost increase.
Keywords:FPGA  resolver  resolver-digital converter  ΔΣ modulation  CORDIC algorithm  digital PLL
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