A model for n-well junction effect on gate-charging damage inPMOSFETs |
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Authors: | Lin W Sery G |
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Affiliation: | Intel Corp, Santa Clara, CA; |
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Abstract: | A quantitative model explaining N-well junction effect on gate charging damage in PMOSFETs is presented. This model takes into account the reverse-biased N-well junction leakage, generated both thermally and by photons and its behavior on limiting charging current passing through gate oxide during plasma processing. The modeling results suggest that plasma illumination plays a key role in enabling gate charging damage in PMOSFETs. The model can also apply to reverse-biased source and drain junctions in both P and NMOSFETs during plasma events |
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