基于RapidIO的双主机节点嵌入式系统互联设计

分布式并行计算的发展对嵌入式系统互联技术提出了更高的要求,RapidIO可提供芯片间、板间的高性能互联,传输效率高于PCIE和千兆以太网。文中给出了一种基于RapidIO的双主机节点嵌入式系统互联的设计方案、硬件设计及其软件实现,并对系统功能和性能进行验证。验证结果表明,该系统性能稳定、可靠,并为新一代高性能嵌入式系统互联提供了良好的解决方案。

Design of a Dual Host Embedded System Interconnect Based on RapidIO

The development of distributed parallel computing puts high demands on the Internet technology in embedded system.RapidIO can provide high performance interconnection between chip to chip,board to board,with higher transmission efficiency than PCIE and Gigabit Ethernet.The paper presents a schematic design,hardware design and software driver of system interconnect with double host based on RapidIO,and proposes a verification scheme for the function design and capability of system interconnect.The system is very stable and reliable,and serves as a good solution to the new generation of high performance embedded system.