Impact of electron and hole inversion-layer capacitance on lowvoltage operation of scaled n- and p-MOSFET's |
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Authors: | Takagi S Takayanagi M Toriumi A |
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Affiliation: | Adv. LSI Technol. Lab., Yokohama; |
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Abstract: | The influence of inversion-layer capacitance (Cinv) on supply voltage (Vdd) of n- and p-MOSFET's is quantitatively examined. The physical origin of the effect of Cinv on Vdd consists in the band bending of a Si substrate in the inversion condition due to Cinv, which is not scaled with a reduction in gate oxide thickness. The amount and the impact of the band bending is accurately evaluated on a basis of one dimensional (1-D) self-consistent calculations including two-dimensional (2-D) subband structure of inversion-layer electrons and holes. It is demonstrated that additional band bending of a Si substrate due to Cinv becomes a dominant factor to limit the lowering of Vdd for CMOS with ultrathin gate oxides. The operation at Vdd lower than 0.6 V is quite difficult even with effective Tox less than 1 nm |
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