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基于FPGA的多功能电缆测试仪
引用本文:王文文.基于FPGA的多功能电缆测试仪[J].软件,2011,32(4):69-70,73.
作者姓名:王文文
作者单位:中国矿业大学信息与信电学院,徐州,221008
摘    要:本文介绍了电缆测试仪的测量方法,并提出了一种使用FPGA实现误码测试及衰减测试的设计及实现方法。该设计可通过FPGA内建的异步串行接口向主控计算机传递误码信息,也可以通过数码管实时显示一段时间内的误码率,在系统设计中,采用DDS技术产生高精度的正弦信号,将该信号通过真有效值(RMS)芯片转换为直流电平,再将该信号通过AD转换芯片转换为数字信号。本文还介绍了该系统的构成和工作流程,然后重点分析了关键技术的实现:误码测试衰减测试m序列等。该测量仪在试验测量中获得了较高的测量高度,能满足实际工程的应用要求。

关 键 词:FPGA  误码测试  衰减测试  m序列

Design of FPGA-based the measuring apparatus of cable
WANG Wen-wen.Design of FPGA-based the measuring apparatus of cable[J].Software,2011,32(4):69-70,73.
Authors:WANG Wen-wen
Affiliation:WANG Wen-wen (School OF Information And Electrical Engineering,China University of Mining and Technology,XuZhou 221008)
Abstract:In this paper we introduce the measurement method for the cable measurement,and also present a design for bit error ratio test using FPGA.This design can either transfer bit error information to control computer through the UART interface built inside the FPGA,or display the error rate by segment LED.In the design of system,DDS technology is used to generate high-precision sinusoidal excitation signal,and then the signal pass the RMS chip and the signal is converted for direct current,and after that the signal through the AD conversion chip then it is converted for digital signal.And this paper first introduces the architecture and working flow of the design,and then gives the method of realization of some key techniques.The experiments show that the apparatus offers higher accuracy,which satisfies the need for the practical applications.
Keywords:FPGA bit error ratio testing attenuation testing m sequence
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