Application of selective epitaxial silicon and chemo-mechanicalpolishing to bipolar transistors |
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Authors: | Nguyen C.T. Kuehne S.C. Wong S.S. Garling L.K. Drowley C. |
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Affiliation: | Dept. of Electron. & Electr. Eng., Univ. of Sci. & Technol., Kowloon; |
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Abstract: | Successful demonstration of single-polysilicon bipolar transistors fabricated using selective epitaxial growth (SEG) and chemo-mechanical polishing (CMP) is reported. The pedestal structure made possible by the SEG/CMP process combination results in significantly reduced extrinsic-base collector capacitance. Cut-off frequency (fT) of devices with emitter stripe width of 1 μm, a base width of 110 nm, and a peak base doping of 3×1018 cm-3 have been observed to improve from 16 GHz to 22 GHz when the extrinsic-base collector overlap is decreased from 1 μm to 0.2 μm. Leakage current, often a problem for SEG structures, has been reduced to 27 nA/cm2 for the area component, and 10 nA/cm for the edge component, by (1) appropriate post-polish processing, including a high-temperature anneal and sacrificial oxidation, (2) aligning the device sidewalls along the 〈100〉 direction, and (3) the presence of the pedestal structure. Base-emitter junction nonideality in these transistors has also been investigated |
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