用于芯片电容精确测量的在片开路方法研究

为实现芯片电容参数测量过程中的有效开路,提高在片电容测量的准确性及一致性,针对在片电容开路方法开展了研究工作。通过对标准电容器及开路器原理结构进行分析,结合半导体芯片工艺测试实际需求,设计并制作了在片开路器。在完成在片电容测试系统搭建基础上,分别利用传统悬空开路法和在片开路法对1pF量值的在片电容进行了测量。实验数据显示,同悬空开路法相比,在片开路法电容测量结果的准确性及一致性有显著提升,测量重复性可达0.01%,为芯片电容计量测试工作提供了有效开路手段。

Research on On-wafer Open Method for Chip Capacitance Measurement

To achieve the effective open operation during the chip capacitance measurement, and enhance the veracity and coherence of the results, the on-wafer open method was researched. By analyzing the principle and structure of the standard capacitor and open termination, combined with the actual needs of semiconductor technical measurement, the on-wafer open instrument was designed and manufactured. Based on constructing the on-wafer capacitance test system, measurements on 1pF chip capacitance were conducted using traditional hanging open method and on-wafer open method. Results show that, compared with hanging open method, the on-wafer open method improves the veracity and coherence of test data, while the measuring repeatability achieves 0.01%, which offers an effective open method for chip capacitance metrology and measurement.