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降低锁相式频率合成器相位噪声方法研究
引用本文:贾晶,高玉良. 降低锁相式频率合成器相位噪声方法研究[J]. 空军雷达学院学报, 2009, 23(6): 429-431,434. DOI: 10.3969/j.issn.1673-8691.2009.06.012
作者姓名:贾晶  高玉良
作者单位:1. 空军雷达学院研究生管理大队,武汉,430019
2. 空军雷达学院信息对抗系,武汉,430019
摘    要:针对锁相式频率合成器噪声特点,简述了相位噪声的表征形式,分析了锁相式频率合成嚣相位噪声的产生原因,提出了几种降低相位噪声的方法.ADS软件仿真的结果表明,这几种方法能够有效地改善锁相式频率合成器的相位噪声特性,提高频率合成器的稳定性,具有实际运用意义.

关 键 词:锁相式频率合成器  相位噪声  最佳环路带宽  ADS软件

Research on Reducing the Phase Noise of PLL Frequency Synthesizer
Affiliation:JIA Jing, GAO Yu-liang (1. Department of Graduate Management, AFRA, Wuhan 430019, China 2. Department of Electronic Information Countermeasures, AFRA, Wuhan 430019, China)
Abstract:Aimed at the noise characteristics of phase locked loop (PLL) frequency synthesizer, the expression of the phase noise was introduced briefly, the causes of phase noise generation of the PLL frequency synthesizer were analyzed, and several effective methods of reducing the phase noise put forward. By simulation over ADS software it is shown that the proposed methods can be used for improving efficiently the phase noise performance and the stability of the PLL frequency synthesizer, which is of engineering significance.
Keywords:PLL frequency synthesizer  phase noise  optimum loop bandwidth  ADS software
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