Low power adiabatic logic based on FinFETs |
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Authors: | LIAO Nan CUI XiaoXin LIAO Kai MA KaiSheng WU Di WEI Wei LI Rui YU DunShan |
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Affiliation: | Institute of Microeleetronics, Peking University, Beijing 100871, China |
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Abstract: | With the aggressive scaling of device technology,the leakage power has become the main part of power consumption,which seriously reduces the energy recovery efciency of adiabatic logic.In this paper,a novel low-power adiabatic logic based on FinFET devices has been proposed.Due to the lower leakage current,higher on-state current and design flexibility of FinFETs,the proposed adiabatic logic shows considerable power reduction,performance improvement and area saving compared with CMOS adiabatic logic.An 8-state clock chain as the test circuit has been demonstrated based on the 32-nm FinFET Predictive Technology Model.The simulation results show that adiabatic circuit based on FinFET devices achieves a power reduction of up to84.8%and a limiting frequency of up to 55 GHz. |
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Keywords: | leakage power FinFET adiabatic logic power reduction limiting frequency |
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