Shunting neural network photodetector arrays in analog CMOS |
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Authors: | Nilson C.D. Darling R.B. Pinter R.B. |
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Affiliation: | Dept. of Electr. Eng., Washington Univ., Seattle, WA; |
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Abstract: | This paper describes a custom analog CMOS photodetector array IC that exploits nonlinear lateral inhibition to achieve dynamic range compression, edge enhancement, and adaptation to mean input intensity. The neural net array architecture, characterized by nearest-neighbor connections and multiplicative cell interaction, is modeled after biological vision systems. The fabricated IC successfully implements a portion of the compact and powerful nonlinear signal processing performed in the outer layers of the vertebrate retina. Measured results are presented for an optical input intensity range of nearly six decades. A scanning architecture that allows for preferential directional sensitivity is also demonstrated. Measured data agree well with models created using a spreadsheet program |
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