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SOC中的MBIST设计
引用本文:桂江华,钱黎明,申柏泉,周毅.SOC中的MBIST设计[J].电子与封装,2011,11(1):26-28,36.
作者姓名:桂江华  钱黎明  申柏泉  周毅
作者单位:中国电子科技集团公司第58研究所;
摘    要:随着超大规模集成电路的发展,设计的集成度越来越高,基于IP的SOC设计正在成为IC设计的主流.为了确保SOC的功能正确,可测性设计(Design for Test,简称DFT)显得尤为关键.DFT设计包括扫描设计、JTAG设计和BIST设计.另外,当前SOC芯片中集成了大量的存储器,为了确保存储器没有故障,基于存储器的...

关 键 词:SOC  JTAG  内建自测试

The MBIST Architecture for SOC
GUI Jiang-hua,QIAN Li-ming,SHEN Bai-quan,ZHOU Yi.The MBIST Architecture for SOC[J].Electronics & Packaging,2011,11(1):26-28,36.
Authors:GUI Jiang-hua  QIAN Li-ming  SHEN Bai-quan  ZHOU Yi
Affiliation:GUI Jiang-hua,QIAN Li-ming,SHEN Bai-quan,ZHOU Yi(China Electronic Technology Group Corporation No.58 Research Institute,Wuxi 214035,China)
Abstract:With the development of CMOS IC,the integration of design is becoming larger and larger.So System-on-Chip(SOC) which is based on IP is the main direction of IC design.In order to insure SOC function,Design-for-Test(DFT) is more and more popular.DFT include SCAN 、JTAG and BIST.At the same time,SOC contain a lot of memories.To test these memories,memory Build-in-Self-Test(MBIST) is very useful.The paper explains how to design JTAG and MBIST and how to use ARM TAP to control MBIST.This method can achieve DFT and save hardware spending.
Keywords:SOC  JTAG  MBIST  
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