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Single electron transistor fabricated with SOI wafer
Affiliation:Department of Electrical Engineering, Keio University, Hiyoshi, Yokohama 223-8522, Japan;Department of Chemical Sciences, University of Catania, Viale A.Doria 6, 95125 Catania, Italy;University of Lund, Solid State Physics, Box 118, S-221 00 Lund, Sweden;Institut fuer Angewandte Physik, Halbleiterphysik, TU Dresden, D-01062 Dresden, Germany;Department of Chemistry & CSGI, room 295, University of Florence, via della Lastruccia 3, Sesto Fiorentino, 50019 Florence, Italy
Abstract:The single electron transistor (SET) is the most sensitive device for measuring the charge of electron. It has been proposed by Kane that the SET can be used for readout of calculated results in Si-based quantum computer. We fabricated the SET with SOI substrate utilizing the suspended mask of SiO2 and Si for the purpose of using it for readout of calculation in Si-Based quantum computer. By using only the above materials for the mask, high temperature processes including ion implantation and activation annealing could be possible and it was never achieved in conventional methods with the suspended mask with photoresist. First, the suspended mask with enough undercut in SOI was made by removing the box oxide of SOI wafer combining with pattern delineation by electron beam lithography, anisotropically reactive ion etching and isotropic wet etching. After forming the suspended mask, Al films were evaporated from two different angles to make an overlap just below the bridge, resulting in completing the SET in the undercut region possible to measure the electron spin. After making the Al/Al2O3/Al SET, we measured the IV characteristic between source and drain at 1.8 K. The Coulomb blockade and the Coulomb oscillation were observed.
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