A self-aligned short process for insulated-gate bipolar transistors |
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Authors: | Chow T.P. Baliga B.J. Gray P.V. Adler M.S. Chang M.F. Pifer G.C. Yilmaz H. |
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Affiliation: | General Electric Co., Schenectady, NY; |
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Abstract: | An n-channel vertical insulated-gate bipolar transistor (IGBT) process which implements a self-aligned p+ short inside the DMOS diffusion windows is proposed and demonstrated experimentally. The salient feature of the new process is the placement of a poly-Si plug to define the diffusion window of the p+ short. Similar forward conduction characteristics and tradeoffs with turn-off time were obtained for these self-aligned short IGBTs when compared to conventional IGBTs with non-self-aligned shorts. With a resistive load and no external gate resistor, dynamic latching current was seen to increase with increasing p+ diffusion depth and electron irradiation dosage, as well as with larger p+ diffusion windows |
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