New logical-sum and logical-product circuits using CMOS transistors and their applications to four-valued combinational circuits: T Watanabe,M Matsumoto,T Li (Dept. of Electr. Eng., Fac. of Eng., Tokyo Univ., Saitama,Japan) Int. J. Electron. (GB), vol. 63, no. 2, pp. 215–227 (Aug. 1987) 期刊界 All Journals 搜尽天下杂志传播学术成果专业期刊搜索期刊信息化学术搜索

New logical-sum and logical-product circuits using CMOS transistors and their applications to four-valued combinational circuits: T Watanabe,M Matsumoto,T Li (Dept. of Electr. Eng., Fac. of Eng., Tokyo Univ., Saitama,Japan) Int. J. Electron. (GB), vol. 63, no. 2, pp. 215–227 (Aug. 1987)

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