The low power analogue and digital baseband processing parts of a novel multimode DECT/GSM/DCS1800 terminal

In order to support a multimode DECT/GSM/DCS1800 terminal architecture, with low power characteristics and integrated support for direct conversion terminal architecture, the critical parts of such a terminal were designed and implemented using three different chips. These parts include a baseband processor, a modem and suitable analogue parts. The baseband processor was designed to support multimode operation, all baseband processing required and different terminal architectures (heterodyne or direct conversion). The modem features a GMSK/GFSK modulator and a novel, low power detection algorithm supports a direct conversion terminal. The analogue circuitry includes analogue filters and Digital-to-Analog and Analog-to-Digital converters. The architecture of the direct conversion wireless terminal is presented along with details on the low power characteristics of the processor and the modem. Experimental results from the operation of the multimode terminal are presented.