满足各种挑战的WCSP封装持续增长

晶圆级芯片尺寸封装（WCSP）消除了类似传统的芯片键合、引线键合和倒装芯片贴装过程的封装工序。这种办法可以为半导体产品用户实现更快的上市时间。WCSP封装应用空间正在扩大到新的领域，并根据管脚数量和器件类型进行细分。WCSP封装正在集成无源、分立元件、射频和存储器器件方面得到应用，并扩展到逻辑集成电路和MEMS器件。但伴随着这种应用的增长出现了很多问题，其中包括随着芯片尺寸和管脚数量的增长对电路板可靠性的影响。概述当今的挑战，以及这些集成和硅通孔技术的未来趋势。

WCSP Continues to Grow as Challenges are Met

Wafer chip scale packaging （WCSP） eliminates conventional packaging steps such as die bonding, wire bonding, and die level flip chip attach processes. Such an approach enables faster time to market for semiconductor customers. WCSP application spaces are expanding into new areas and are segmenting based on pin count and device type. The applications of WCSP in integrating passives, discretes, RF, and memory devices are also expanding to logic ICs and MEMS.？But with this growth come a number of challenges, including the impact to board-level reliability as die sizes and pin counts increase. This article will review today＇s challenges, along with such future trends as integration and through-silicon via （TSV） technologies.